A-SSCC 2014

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A-SSCC 2014プログラムが発表されました.

今年は松澤・岡田研究室から3本採択されました.

 

6-3
A 0.5-to-1 V 9-Bit 15-to-90 Ms/S Digitally Interpolated
Pipelined-SAR ADC Using Dynamic Amplifier
James Lin, Zule Xu, Masaya Miyahara, Akira Matsuzawa
12-4
A 0.015-mm2 60-GHz Reconfigurable Wake-Up Receiver by
Reusing Multi-Stage LNAs
Rui Wu, Qinghong Bu, Wei Deng, Kenichi Okada, Akira Matsuzawa
17-4
A 0.011 mm2 PVT-Robust Fully-Synthesizable CDR with a
Data Rate of 10.05 Gb/S Using Injection-Locking Technique
AravindTharayil Narayanan, Wei Deng, Yang Dongsheng,
Wu Rui, Kenichi Okada, Akira Matsuzawa

6-3

A 0.5-to-1 V 9-Bit 15-to-90 Ms/S Digitally Interpolated

Pipelined-SAR ADC Using Dynamic Amplifier

James Lin, Zule Xu, Masaya Miyahara, Akira Matsuzawa

ダイナミックアンプを使ったADC


12-4

A 0.015-mm2 60-GHz Reconfigurable Wake-Up Receiver by

Reusing Multi-Stage LNAs

Rui Wu, Qinghong Bu, Wei Deng, Kenichi Okada, Akira Matsuzawa

呼び出し信号で起動する60GHz Rx


17-4

A 0.011 mm2 PVT-Robust Fully-Synthesizable CDR with a

Data Rate of 10.05 Gb/S Using Injection-Locking Technique

AravindTharayil Narayanan, Wei Deng, Yang Dongsheng,

 Wu Rui, Kenichi Okada, Akira Matsuzawa

論理合成可能なCDR

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